Added AMD (3DNow!,SSE5 and XOP)Instructions.
XML Refactoring.
This commit is contained in:
Mahdi Safsafi
parent
e56d77147c
commit
393aac9800
10 changed files with 2416 additions and 16 deletions
210
xml/raw/x86/AMD/3DNow.xml
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210
xml/raw/x86/AMD/3DNow.xml
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<?xml version="1.0" encoding="ASCII"?>
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<!DOCTYPE instrs SYSTEM "3DNow_Rules.dtd">
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<!-- Copyright (c) 2015 Mahdi Safsafi
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
|
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in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
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THE SOFTWARE.
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-->
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<!-- https://github.com/MahdiSafsafi/Parsable-Instructions -->
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<!--
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This XML file includes all instructions found in :
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3DNow! Technology Manual 21928G/0-March 2000 document.
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-->
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<instrs version="1.00">
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<common>
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<brief>FEMMS</brief>
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<ins>
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<mnem>FEMMS</mnem>
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<args>void</args>
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<opc>0F 0E</opc>
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<dscrp>Faster Enter/Exit of the MMX or floating-point state.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PAVGUSB</brief>
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<ins>
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<mnem>PAVGUSB</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r BF</opc>
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<dscrp>Average of unsigned packed 8-bit values.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PF2ID</brief>
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<ins>
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<mnem>PF2ID</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 1D</opc>
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<dscrp>Converts packed floating-point operand to packed 32-bit integer.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFACC</brief>
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<ins>
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<mnem>PFACC</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r AE</opc>
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<dscrp>Floating-point accumulate.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFADD</brief>
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<ins>
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<mnem>PFADD</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 9E</opc>
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<dscrp>Packed, floating-point addition.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFCMPEQ</brief>
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<ins>
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<mnem>PFCMPEQ</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r B0</opc>
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<dscrp>Packed floating-point comparison, equal to.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFCMPGE</brief>
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<ins>
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<mnem>PFCMPGE</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 90</opc>
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<dscrp>Packed floating-point comparison, greater than or equal to.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFCMPGT</brief>
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<ins>
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<mnem>PFCMPGT</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r A0</opc>
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<dscrp>Packed floating-point comparison, greater than.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFMAX</brief>
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<ins>
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<mnem>PFMAX</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r A4</opc>
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<dscrp>Packed floating-point maximum.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFMIN</brief>
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<ins>
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<mnem>PFMIN</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 94</opc>
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<dscrp>Packed floating-point minimum.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFMUL</brief>
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<ins>
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<mnem>PFMUL</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r B4</opc>
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<dscrp>Packed floating-point multiplication.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFRCP</brief>
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<ins>
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<mnem>PFRCP</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 96</opc>
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<dscrp>Floating-point reciprocal approximation.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFRCPIT1</brief>
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<ins>
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<mnem>PFRCPIT1</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r A6</opc>
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<dscrp>Packed floating-point reciprocal, first iteration step.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFRCPIT2</brief>
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<ins>
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<mnem>PFRCPIT2</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r B6</opc>
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<dscrp>Packed floating-point reciprocal/reciprocal square root, second iteration step.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFRSQIT1</brief>
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<ins>
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<mnem>PFRSQIT1</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r A7</opc>
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<dscrp>Packed floating-point reciprocal square root, first iteration step.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFRSQRT</brief>
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<ins>
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<mnem>PFRSQRT</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 97</opc>
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<dscrp>Floating-point reciprocal square root approximation.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFSUB</brief>
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<ins>
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<mnem>PFSUB</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 9A</opc>
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<dscrp>Packed floating-point subtraction.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PFSUBR</brief>
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<ins>
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<mnem>PFSUBR</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r AA</opc>
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<dscrp>Packed floating-point reverse subtraction.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PI2FD</brief>
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<ins>
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<mnem>PI2FD</mnem>
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<args>mmreg1,mmreg2/mem64</args>
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<opc>0F 0F /r 0D</opc>
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<dscrp>Packed 32-bit integer to floating-point conversion.</dscrp>
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</ins>
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</common>
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<common>
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<brief>PREFETCHW</brief>
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<ins>
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<mnem>PREFETCHW</mnem>
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<args>mem8</args>
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<opc>0F 0D</opc>
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<dscrp>Prefetch processor cache line into L1 data cache (Dcache).</dscrp>
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</ins>
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</common>
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</instrs>
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15
xml/raw/x86/AMD/3DNow_Rules.dtd
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15
xml/raw/x86/AMD/3DNow_Rules.dtd
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@ -0,0 +1,15 @@
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<?xml version="1.0" encoding="ASCII"?>
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<!-- 3DNow rules -->
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<!ELEMENT instrs (common+)>
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<!ELEMENT common (brief,ins)>
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<!ELEMENT ins (mnem,args,opc,dscrp)>
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<!ELEMENT brief (#PCDATA)>
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<!ELEMENT mnem (#PCDATA)>
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<!ELEMENT args (#PCDATA)>
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<!ELEMENT opc (#PCDATA)>
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<!ELEMENT dscrp (#PCDATA)>
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<!ATTLIST instrs version CDATA #REQUIRED>
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1119
xml/raw/x86/AMD/SSE5.xml
Normal file
1119
xml/raw/x86/AMD/SSE5.xml
Normal file
File diff suppressed because it is too large
Load diff
17
xml/raw/x86/AMD/SSE5_Rules.dtd
Normal file
17
xml/raw/x86/AMD/SSE5_Rules.dtd
Normal file
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@ -0,0 +1,17 @@
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<?xml version="1.0" encoding="ASCII"?>
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<!-- XOP Rules -->
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<!ELEMENT instrs (common+)>
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<!ELEMENT common (brief,dscrp,ins+)>
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<!ELEMENT ins (mnem,args,opc)>
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<!ELEMENT brief (#PCDATA)>
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<!ELEMENT dscrp (#PCDATA)>
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<!ELEMENT mnem (#PCDATA)>
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<!ELEMENT args (#PCDATA)>
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<!ELEMENT opc (#PCDATA)>
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<!ATTLIST instrs version CDATA #REQUIRED>
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990
xml/raw/x86/AMD/XOP.xml
Normal file
990
xml/raw/x86/AMD/XOP.xml
Normal file
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@ -0,0 +1,990 @@
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<?xml version="1.0" encoding="ASCII"?>
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<!DOCTYPE instrs SYSTEM "XOP_Rules.dtd">
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<!-- Copyright (c) 2015 Mahdi Safsafi
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Permission is hereby granted, free of charge, to any person obtaining a copy
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||||
of this software and associated documentation files (the "Software"), to deal
|
||||
in the Software without restriction, including without limitation the rights
|
||||
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
copies of the Software, and to permit persons to whom the Software is
|
||||
furnished to do so, subject to the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included in
|
||||
all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
THE SOFTWARE.
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||||
|
||||
-->
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<!-- https://github.com/MahdiSafsafi/Parsable-Instructions -->
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<!--
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This XML file includes all instructions found in :
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AMD64 Architecture Programmers Manual Volume 6: 128-Bit and 256-Bit XOP and FMA4 Instructions Pub No 43479 Rev 3.04 Date November 2009 document.
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-->
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<instrs version="1.00">
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<common>
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<brief>VFMADDPD--Multiply and Add Packed Double-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDPD</mnem>
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<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 69 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPD</mnem>
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<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
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<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 69 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPD</mnem>
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<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
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<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 69 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPD</mnem>
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<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
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<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 69 /r /is4</opc>
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</ins>
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</common>
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<common>
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<brief>VFMADDPS--Multiply and Add Packed Single-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDPS</mnem>
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<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 68 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPS</mnem>
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<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
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<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 68 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPS</mnem>
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<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
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<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 68 /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDPS</mnem>
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<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
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<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 68 /r /is4</opc>
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</ins>
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</common>
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<common>
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<brief>VFMADDSD--Multiply and Add Scalar Double-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDSD</mnem>
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<args>xmm1,xmm2,xmm3/mem64,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6B /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDSD</mnem>
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<args>xmm1,xmm2,xmm3,xmm4/mem64</args>
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<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6B /r /is4</opc>
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</ins>
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</common>
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<common>
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<brief>VFMADDSS--Multiply and Add Scalar Single-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDSS</mnem>
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<args>xmm1,xmm2,xmm3/mem32,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6A /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDSS</mnem>
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<args>xmm1,xmm2,xmm3,xmm4/mem32</args>
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<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6A /r /is4</opc>
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||||
</ins>
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||||
</common>
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<common>
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<brief>VFMADDSUBPD--Multiply with Alternating Add/Subtract of Packed Double-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDSUBPD</mnem>
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<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 5D /r /is4</opc>
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||||
</ins>
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||||
<ins>
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<mnem>VFMADDSUBPD</mnem>
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<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
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||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 5D /r /is4</opc>
|
||||
</ins>
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||||
<ins>
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<mnem>VFMADDSUBPD</mnem>
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||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
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||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 5D /r /is4</opc>
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||||
</ins>
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||||
<ins>
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<mnem>VFMADDSUBPD</mnem>
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<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
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<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 5D /r /is4</opc>
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</ins>
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</common>
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<common>
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<brief>VFMADDSUBPS--Multiply with Alternating Add/Subtract of Packed Single-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMADDSUBPS</mnem>
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<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
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<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 5C /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDSUBPS</mnem>
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<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
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<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 5C /r /is4</opc>
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||||
</ins>
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||||
<ins>
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<mnem>VFMADDSUBPS</mnem>
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<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
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<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 5C /r /is4</opc>
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</ins>
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<ins>
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<mnem>VFMADDSUBPS</mnem>
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<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
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||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 5C /r /is4</opc>
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||||
</ins>
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||||
</common>
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||||
<common>
|
||||
<brief>VFMSUBADDPD--Multiply with Alternating Subtract/Add of Packed Double-Precision Floating-Point.</brief>
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<ins>
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<mnem>VFMSUBADDPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 5F /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 5F /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 5F /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 5F /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFMSUBADDPS--Multiply with Alternating Subtract/Add of Packed Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 5E /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 5E /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 5E /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBADDPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 5E /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFMSUBPD--Multiply and Subtract Packed Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFMSUBPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 6D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 6D /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFMSUBPS--Multiply and Subtract Packed Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFMSUBPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 6C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 6C /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFMSUBSD--Multiply and Subtract Scalar Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFMSUBSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem64,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6F /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem64</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6F /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFMSUBSS--Multiply and Subtract Scalar Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFMSUBSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem32,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 6E /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFMSUBSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem32</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 6E /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMADDPD--Negative Multiply and Add Packed Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMADDPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 79 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 79 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 79 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 79 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMADDPS--Negative Multiply and Add Packed Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMADDPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 78 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 78 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 78 /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 78 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMADDSD--Negative Multiply and Add Scalar Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMADDSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem64,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7B /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem64</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7B /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMADDSS--Negative Multiply and Add Scalar Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMADDSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem32,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7A /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMADDSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem32</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7A /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMSUBPD--Negative Multiply and Subtract Packed Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 7D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7D /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPD</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 7D /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMSUBPS--Negative Multiply and Subtract Packed Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.66 7C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7C /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBPS</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.66 7C /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMSUBSD--Negative Multiply and Subtract Scalar Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMSUBSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem64,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7F /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBSD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem64</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7F /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFNMSUBSS--Negative Multiply and Subtract Scalar Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFNMSUBSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem32,xmm4</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.66 7E /r /is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFNMSUBSS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem32</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.66 7E /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFRCZPD--Extract Fraction Packed Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFRCZPD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA 81 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFRCZPD</mnem>
|
||||
<args>ymm1,ymm2/mem256</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L1.NA 81 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFRCZPS--Extract Fraction Packed Single-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFRCZPS</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA 80 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VFRCZPS</mnem>
|
||||
<args>ymm1,ymm2/mem256</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L1.NA 80 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFRCZSD--Extract Fraction Scalar Double-Precision Floating-Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFRCZSD</mnem>
|
||||
<args>xmm1,xmm2/mem64</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA 83 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VFRCZSS--Extract Fraction Scalar Single-Precision Floating Point.</brief>
|
||||
<ins>
|
||||
<mnem>VFRCZSS</mnem>
|
||||
<args>xmm1,xmm2/mem32</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA 82 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCMOV--Vector Conditional Moves.</brief>
|
||||
<ins>
|
||||
<mnem>VPCMOV</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA A2 /r imm[7:4]</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPCMOV</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4</args>
|
||||
<opc>XOP.mmmmm8.W0.ysrc1.L1.NA A2 /r imm[7:4]</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPCMOV</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>XOP.mmmmm8.W1.xsrc1.L0.NA A2 /r imm[7:4]</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPCMOV</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256</args>
|
||||
<opc>XOP.mmmmm8.W1.ysrc1.L1.NA A2 /r imm[7:4]</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMB--Compare Vector Signed Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMB</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA CC /r /imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMD--Compare Vector Signed Doublewords.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA CE /r /imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMQ--Compare Vector Signed Quadwords.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMQ</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA CF /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMUB--Compare Vector Unsigned Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMUB</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA EC /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMUD--Compare Vector Unsigned Doublewords.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMUD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA EE /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMUQ--Compare Vector Unsigned Quadwords.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMUQ</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA EF /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMUW--Compare Vector Unsigned Words.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMUW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA ED /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPCOMW--Compare Vector Signed Words.</brief>
|
||||
<ins>
|
||||
<mnem>VPCOMW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA CD /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPERMIL2PD--Permute Two-Source Double-Precision Floating- Point Values.</brief>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.NA 49 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PD</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.NA 49 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PD</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.NA 49 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PD</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.NA 49 /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPERMIL2PS--Permute Two-Source Single-Precision Floating-Point Values.</brief>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PS</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W0.xsrc1.L0.NA 48 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PS</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W1.xsrc1.L0.NA 48 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PS</mnem>
|
||||
<args>ymm1,ymm2,ymm3/mem256,ymm4,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W0.ysrc1.L1.NA 48 /r imm8</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPERMIL2PS</mnem>
|
||||
<args>ymm1,ymm2,ymm3,ymm4/mem256,imm8</args>
|
||||
<opc>VEX3.mmmmm3.W1.ysrc1.L1.NA 48 /r imm8</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDBD--Packed Horizontal Add Signed Byte to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDBD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA C2 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDBQ--Packed Horizontal Add Signed Byte to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDBQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA C3 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDBW--Packed Horizontal Add Signed Byte to Signed Word.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDBW</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA C1 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDDQ--Packed Horizontal Add Signed Doubleword to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDDQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA CB /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUBD--Packed Horizontal Add Unsigned Byte to Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUBD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA D2 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUBQ--Packed Horizontal Add Unsigned Byte to Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUBQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA D3 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUBW--Packed Horizontal Add Unsigned Byte to Word.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUBWD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA D1 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUDQ--Packed Horizontal Add Unsigned Doubleword to Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUDQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA DB /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUWDPacked--Horizontal Add Unsigned Word to Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUWD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA D6 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDUWQ--Packed Horizontal Add Unsigned Word to Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDUWQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA D7 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDWD--Packed Horizontal Add Signed Word to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDWD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA C6 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHADDWQ--Packed Horizontal Add Signed Word to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHADDWQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA C7 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHSUBBW--Packed Horizontal Subtract Signed Byte to Signed Word.</brief>
|
||||
<ins>
|
||||
<mnem>VPHSUBBW</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA E1 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHSUBDQ--Packed Horizontal Subtract Signed Doubleword to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHSUBDQ</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA E3 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPHSUBWD--Packed Horizontal Subtract Signed Word to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPHSUBWD</mnem>
|
||||
<args>xmm1,xmm2/mem128</args>
|
||||
<opc>XOP.mmmmm9.W0.1111.L0.NA E2 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSDD--Packed Multiply Accumulate Signed Doubleword to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSDD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 9E /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSDQH--Packed Multiply Accumulate Signed High Doubleword to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSDQH</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 9F /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSDQL--Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSDQL</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 97 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSSDD--Packed Multiply Accumulate Signed Doubleword to Signed Doubleword with Saturation.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSSDD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 8E /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSSDQH--Packed Multiply Accumulate Signed High Doubleword to Signed Quadword with.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSSDQH</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 8F /r is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSSDQL--Packed Multiply Accumulate Signed Low Doubleword to Signed Quadword with.</brief>
|
||||
<ins>
|
||||
<mnem>PMACSSDQL</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 87 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSSWD--Packed Multiply Accumulate Signed Word to Signed Doubleword with Saturation.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSSWD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 86 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSSWW--Packed Multiply Accumulate Signed Word to Signed Word with Saturation.</brief>
|
||||
<ins>
|
||||
<mnem>PMACSSWW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 85 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSWD--Packed Multiply Accumulate Signed Word to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSWD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 96 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMACSWW--Packed Multiply Accumulate Signed Word to Signed Word.</brief>
|
||||
<ins>
|
||||
<mnem>VPMACSWW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA 95 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMADCSSWD--Packed Multiply, Add and Accumulate Signed Word to Signed Doubleword with Saturation.</brief>
|
||||
<ins>
|
||||
<mnem>VPMADCSSWD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA A6 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPMADCSWD--Packed Multiply Add and Accumulate Signed Word to Signed Doubleword.</brief>
|
||||
<ins>
|
||||
<mnem>PMADCSWD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA B6 /r /is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPPERM--Packed Permute Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPPERM</mnem>
|
||||
<args>xmm1,xmm2,xmm3,xmm4/mem128</args>
|
||||
<opc>XOP.mmmmm8.W1.xsrc1.L0.NA A3 /r is4</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPPERM</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128,xmm4</args>
|
||||
<opc>XOP.mmmmm8.W0.xsrc1.L0.NA A3 /r is4</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPROTB--Packed Rotate Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPROTB</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm8</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 90 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTB</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 90 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTB</mnem>
|
||||
<args>xmm1,xmm2/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.1111.L0.NA C0 /r /ib</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPROTD--Packed Rotate Doublewords.</brief>
|
||||
<ins>
|
||||
<mnem>VPROTD</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 92 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 92 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTD</mnem>
|
||||
<args>xmm1,xmm2/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.1111.L0.NA C2 /ib</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPROTQ--Packed Rotate Quadwords.</brief>
|
||||
<ins>
|
||||
<mnem>VPROTQ</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 93 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTQ</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 93 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTQ</mnem>
|
||||
<args>xmm1,xmm2/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.1111.L0.NA C3 /ib</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPROTW--Packed Rotate Words.</brief>
|
||||
<ins>
|
||||
<mnem>VPROTW</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 91 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 91 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPROTW</mnem>
|
||||
<args>xmm1,xmm2/mem128,imm8</args>
|
||||
<opc>XOP.mmmmm8.W0.1111.L0.NA C1 /r /ib</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHAB--Packed Shift Arithmetic Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHAB</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 98 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHAB</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 98 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHAD--Packed Shift Arithmetic Doublewords.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHAD</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 9A /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHAD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 9A /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHAQ--Packed Shift Arithmetic Quadwords.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHAQ</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 9B /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHAQ</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 9B /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHAW--Packed Shift Arithmetic Words.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHAW</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 99 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHAW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 99 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHLB--Packed Shift Logical Bytes.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHLB</mnem>
|
||||
<args>xmm1,xmm2/mem128,xmm3</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 94 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHLB</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 94 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHLD--Packed Shift Logical Doublewords.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHLD</mnem>
|
||||
<args>xmm1,xmm3/mem128,xmm2</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 96 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHLD</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 96 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHLQ--Packed Shift Logical Quadwords.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHLQ</mnem>
|
||||
<args>xmm1,xmm3/mem128,xmm2</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 97 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHLQ</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 97 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
<common>
|
||||
<brief>VPSHLW--Packed Shift Logical Words.</brief>
|
||||
<ins>
|
||||
<mnem>VPSHLW</mnem>
|
||||
<args>xmm1,xmm3/mem128,xmm2</args>
|
||||
<opc>XOP.mmmmm9.W0.xcnt.L0.NA 95 /r</opc>
|
||||
</ins>
|
||||
<ins>
|
||||
<mnem>VPSHLW</mnem>
|
||||
<args>xmm1,xmm2,xmm3/mem128</args>
|
||||
<opc>XOP.mmmmm9.W1.xsrc.L0.NA 95 /r</opc>
|
||||
</ins>
|
||||
</common>
|
||||
</instrs>
|
||||
15
xml/raw/x86/AMD/XOP_Rules.dtd
Normal file
15
xml/raw/x86/AMD/XOP_Rules.dtd
Normal file
|
|
@ -0,0 +1,15 @@
|
|||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<!-- XOP Rules -->
|
||||
|
||||
<!ELEMENT instrs (common+)>
|
||||
<!ELEMENT common (brief,ins+)>
|
||||
<!ELEMENT ins (mnem,args,opc)>
|
||||
|
||||
<!ELEMENT brief (#PCDATA)>
|
||||
<!ELEMENT mnem (#PCDATA)>
|
||||
<!ELEMENT args (#PCDATA)>
|
||||
<!ELEMENT opc (#PCDATA)>
|
||||
|
||||
|
||||
|
||||
<!ATTLIST instrs version CDATA #REQUIRED>
|
||||
|
|
@ -1,8 +1,5 @@
|
|||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<!DOCTYPE x86ins SYSTEM "ins_rules.dtd">
|
||||
<!--
|
||||
https://github.com/MahdiSafsafi/Parsable-Instructions
|
||||
-->
|
||||
<!DOCTYPE instrs SYSTEM "AVX512_Rules.dtd">
|
||||
<!-- Copyright (c) 2015 Mahdi Safsafi
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
|
|
@ -24,6 +21,7 @@ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|||
THE SOFTWARE.
|
||||
|
||||
-->
|
||||
<!-- https://github.com/MahdiSafsafi/Parsable-Instructions -->
|
||||
<!--
|
||||
This XML file includes all instructions found in :
|
||||
Intel Architecture Instruction Set Extensions Programming Reference 319433-022 document.
|
||||
|
|
@ -45,7 +43,7 @@ THE SOFTWARE.
|
|||
|
||||
****FOR THE REST OF KEYS YOU SHOULD REFER TO INTEL DOCUMENTATIONS!****
|
||||
-->
|
||||
<x86ins version="1.00">
|
||||
<instrs version="1.00">
|
||||
<common>
|
||||
<brief>ADDPD--Add Packed Double-Precision Floating-Point Values.</brief>
|
||||
<ins x32m="V" x64m="V">
|
||||
|
|
@ -25901,4 +25899,4 @@ THE SOFTWARE.
|
|||
<oprnd4>NA</oprnd4>
|
||||
</oprndenc>
|
||||
</common>
|
||||
</x86ins>
|
||||
</instrs>
|
||||
|
|
@ -1,4 +1,5 @@
|
|||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<!-- AZ Rules -->
|
||||
<!--
|
||||
https://github.com/MahdiSafsafi/Parsable-Instructions
|
||||
-->
|
||||
|
|
@ -7,7 +8,7 @@ https://github.com/MahdiSafsafi/Parsable-Instructions
|
|||
If XML validation failed ,you probably have a corrupted data !
|
||||
-->
|
||||
|
||||
<!ELEMENT x86ins (common+)>
|
||||
<!ELEMENT instrs (common+)>
|
||||
|
||||
<!ELEMENT common (brief,ins+,oprndenc*)>
|
||||
|
||||
|
|
@ -30,9 +31,8 @@ https://github.com/MahdiSafsafi/Parsable-Instructions
|
|||
<!ELEMENT oprnd4 (#PCDATA)>
|
||||
|
||||
<!-- version attribute must be specified !-->
|
||||
<!ATTLIST x86ins version CDATA #REQUIRED>
|
||||
<!ATTLIST instrs version CDATA #REQUIRED>
|
||||
<!ATTLIST ins x32m CDATA "V"> <!-- x32m default to Valid if not specified.-->
|
||||
<!ATTLIST ins x64m CDATA "V"> <!-- x64m default to Valid if not specified.-->
|
||||
<!ATTLIST opc openc CDATA "">
|
||||
<!ATTLIST oprndenc openc CDATA #REQUIRED>
|
||||
|
||||
|
|
@ -1,8 +1,5 @@
|
|||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<!DOCTYPE x86ins SYSTEM "ins_rules.dtd">
|
||||
<!--
|
||||
https://github.com/MahdiSafsafi/Parsable-Instructions
|
||||
-->
|
||||
<!DOCTYPE instrs SYSTEM "AZ_Rules.dtd">
|
||||
<!-- Copyright (c) 2015 Mahdi Safsafi
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
|
|
@ -24,6 +21,7 @@ OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|||
THE SOFTWARE.
|
||||
|
||||
-->
|
||||
<!-- https://github.com/MahdiSafsafi/Parsable-Instructions -->
|
||||
<!--
|
||||
This XML file includes all instructions found in :
|
||||
Intel 64 and IA-32 Architectures Software Developers Manuals Volume 2 document.
|
||||
|
|
@ -45,7 +43,7 @@ THE SOFTWARE.
|
|||
|
||||
****FOR THE REST OF KEYS YOU SHOULD REFER TO INTEL DOCUMENTATIONS!****
|
||||
-->
|
||||
<x86ins version="1.00">
|
||||
<instrs version="1.00">
|
||||
<common>
|
||||
<brief>AAA--ASCII Adjust After Addition.</brief>
|
||||
<ins x32m="V" x64m="I">
|
||||
|
|
@ -22781,4 +22779,4 @@ THE SOFTWARE.
|
|||
<oprnd4>NA</oprnd4>
|
||||
</oprndenc>
|
||||
</common>
|
||||
</x86ins>
|
||||
</instrs>
|
||||
38
xml/raw/x86/Intel/AZ_Rules.dtd
Normal file
38
xml/raw/x86/Intel/AZ_Rules.dtd
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
<?xml version="1.0" encoding="ASCII"?>
|
||||
<!-- AZ Rules -->
|
||||
<!--
|
||||
https://github.com/MahdiSafsafi/Parsable-Instructions
|
||||
-->
|
||||
|
||||
<!-- XML data must be validated.
|
||||
If XML validation failed ,you probably have a corrupted data !
|
||||
-->
|
||||
|
||||
<!ELEMENT instrs (common+)>
|
||||
|
||||
<!ELEMENT common (brief,ins+,oprndenc*)>
|
||||
|
||||
<!-- cpuid and dscrp elements are optional. -->
|
||||
<!ELEMENT ins (mnem,args,opc,cpuid*,dscrp*)>
|
||||
<!-- If cpuid tag found , flag tag must exists. -->
|
||||
<!ELEMENT cpuid (flag+)>
|
||||
<!-- If oprndenc tag found , all oprndX must exists. -->
|
||||
<!ELEMENT oprndenc (oprnd1,oprnd2,oprnd3,oprnd4)>
|
||||
|
||||
<!ELEMENT brief (#PCDATA)>
|
||||
<!ELEMENT mnem (#PCDATA)>
|
||||
<!ELEMENT args (#PCDATA)>
|
||||
<!ELEMENT opc (#PCDATA)>
|
||||
<!ELEMENT flag (#PCDATA)>
|
||||
<!ELEMENT dscrp (#PCDATA)>
|
||||
<!ELEMENT oprnd1 (#PCDATA)>
|
||||
<!ELEMENT oprnd2 (#PCDATA)>
|
||||
<!ELEMENT oprnd3 (#PCDATA)>
|
||||
<!ELEMENT oprnd4 (#PCDATA)>
|
||||
|
||||
<!-- version attribute must be specified !-->
|
||||
<!ATTLIST instrs version CDATA #REQUIRED>
|
||||
<!ATTLIST ins x32m CDATA "V"> <!-- x32m default to Valid if not specified.-->
|
||||
<!ATTLIST ins x64m CDATA "V"> <!-- x64m default to Valid if not specified.-->
|
||||
<!ATTLIST opc openc CDATA "">
|
||||
<!ATTLIST oprndenc openc CDATA #REQUIRED>
|
||||
Loading…
Add table
Reference in a new issue