From 61b885464910f51d09aa01fe959c4a118be34248 Mon Sep 17 00:00:00 2001
From: mquigley <matthew.quigley@gmail.com>
Date: Tue, 4 Oct 2016 19:38:10 -0700
Subject: [PATCH] Fix mismatch of operand encoding for PREFETCHW

The Intel manual actually has this error too, but it does not match up.
---
 xml/raw/x86/Intel/AZ.xml | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xml/raw/x86/Intel/AZ.xml b/xml/raw/x86/Intel/AZ.xml
index aea5ce8..bc26aa0 100644
--- a/xml/raw/x86/Intel/AZ.xml
+++ b/xml/raw/x86/Intel/AZ.xml
@@ -14198,7 +14198,7 @@ THE SOFTWARE.
 		<ins x32m="V" x64m="V">
 			<mnem>PREFETCHW</mnem>
 			<args>m8</args>
-			<opc openc="A">0F 0D /1</opc>
+			<opc openc="M">0F 0D /1</opc>
 			<cpuid>
 				<flag>PRFCHW</flag>
 			</cpuid>
@@ -22777,4 +22777,4 @@ THE SOFTWARE.
 			<oprnd4>NA</oprnd4>
 		</oprndenc>
 	</common>
-</instrs>
\ No newline at end of file
+</instrs>