From 1da681aceaa34ed832a3552a1064931040b34a13 Mon Sep 17 00:00:00 2001
From: mykola2312 <49044616+mykola2312@users.noreply.github.com>
Date: Sat, 21 May 2022 02:58:08 +0300
Subject: [PATCH] implement ARMv7 different architecture profiles, for M
 profile Cortex-M4 - ARMv7E-M. TODO: Fix profile conflicts with `cutil` and
 `test` targets

---
 CMakeLists.txt | 14 ++++++++++++--
 arch/ARMv7.S   | 46 ++++++++++++++++++++++++++++++++++++++++++++++
 cutypes.h      |  8 ++++++++
 string.c       |  4 ++--
 va_list.h      |  4 +++-
 5 files changed, 71 insertions(+), 5 deletions(-)
 create mode 100644 arch/ARMv7.S

diff --git a/CMakeLists.txt b/CMakeLists.txt
index f129fd8..e4be9c5 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -24,7 +24,17 @@ set(SOURCES
     heap.c
 )
 
-set(ARCHITECTURE "AArch64" CACHE STRING "cutil target architecture")
+set(ARCHITECTURE "ARMv7" CACHE STRING "cutil target architecture")
+set(ARM_PROFILE "m" CACHE STRING "cutil ARM architecture profile")
+
+if ("${ARCHITECTURE}" STREQUAL "ARMv7")
+    if ("${ARM_PROFILE}" STREQUAL "m")
+        add_compile_options("-mcpu=cortex-m4")
+        add_compile_options("-mthumb")
+    else()
+        add_compile_options("-march=armv7-${ARM_PROFILE}")
+    endif()
+endif()
 
 add_library(cutil STATIC ${SOURCES} ${HEADERS}
     "arch/${ARCHITECTURE}.S"
@@ -33,7 +43,7 @@ add_library(cutil STATIC ${SOURCES} ${HEADERS}
 option(NOSTDLIB "compile cutil without stdlib" ON)
 if (NOSTDLIB)
     target_compile_definitions(cutil PRIVATE CUTIL_NOSTDLIB)
-    target_compile_options(cutil PRIVATE -nostdlib)
+    target_compile_options(cutil PRIVATE "-nostdlib")
 endif()
 
 add_executable(test test.c)
diff --git a/arch/ARMv7.S b/arch/ARMv7.S
new file mode 100644
index 0000000..01c40f4
--- /dev/null
+++ b/arch/ARMv7.S
@@ -0,0 +1,46 @@
+.globl hw_bswap16
+.globl hw_bswap32
+.globl hw_bswap64
+.globl _cu_memcpy
+.globl _cu_memmove
+.globl _cu_memcmp
+.globl _cu_memset
+.globl cu_memzero
+.globl cu_memtest
+.globl cu_va_start
+.globl cu_va_arg
+
+.text
+
+hw_bswap16:
+    bx lr
+
+hw_bswap32:
+    bx lr
+
+hw_bswap64:
+    bx lr
+
+_cu_memcpy:
+    bx lr
+
+_cu_memmove:
+    bx lr
+
+_cu_memcmp:
+    bx lr
+
+_cu_memset:
+    bx lr
+
+cu_memzero:
+    bx lr
+
+cu_memtest:
+    bx lr
+
+cu_va_start:
+    bx lr
+
+cu_va_arg:
+    bx lr
diff --git a/cutypes.h b/cutypes.h
index 08923d8..1ab1350 100644
--- a/cutypes.h
+++ b/cutypes.h
@@ -86,6 +86,14 @@
 #   warning "unknown architecture"
 #endif
 
+#ifdef CU_ARCH_ARM
+#   if (CU_ARCH >= ARM6T2 && CU_ARCH <= ARM6)
+#       define CU_ARCH_ARM6
+#   elif (CU_ARCH >= ARM7 <= CU_ARCH <= ARM7S)
+#       define CU_ARCH_ARM7
+#   endif
+#endif
+
 #if (CU_ARCH == x86_64 || CU_ARCH == AARCH64 || CU_ARCH == POWERPC64)
 #   define CU_64BIT
 #else
diff --git a/string.c b/string.c
index b36871c..7428c47 100644
--- a/string.c
+++ b/string.c
@@ -373,7 +373,7 @@ void cu_sscanf(char* buf, char* fmt, ...)
                 case 'u':
                 case 'd':
                     len = _cu_strchr_delim(buf,10);
-                    u.iptr = (i64*)(cu_va_arg(&ap,idx++));
+                    u.iptr = (iword*)(cu_va_arg(&ap,idx++));
                     *u.iptr = _cu_atoi(buf,10,len);
                     buf += len; //we decrement because it will +1
                     break;
@@ -381,7 +381,7 @@ void cu_sscanf(char* buf, char* fmt, ...)
                 case 'x':
                     buf += 2; //Skip 0x part
                     len = _cu_strchr_delim(buf,16);
-                    u.iptr = (i64*)(cu_va_arg(&ap,idx++));
+                    u.iptr = (iword*)(cu_va_arg(&ap,idx++));
                     *u.iptr = _cu_atoi(buf,16,len);
                     buf += len; //we decrement because it will +1
                     break;
diff --git a/va_list.h b/va_list.h
index 416761a..1f5061e 100644
--- a/va_list.h
+++ b/va_list.h
@@ -7,7 +7,9 @@
 #   define VA_NUM   6
 #elif (CU_ARCH == AARCH64)
 #   define VA_NUM   8
-#elif
+#elif (defined(CU_ARCH_ARM7))
+#   define  VA_NUM  4
+#else
 #   define VA_NUM   0
 #endif