forked from Lainports/freebsd-ports
666433c681
expression_evaluate.cc: In member function 'virtual bool ExpArithmetic::evaluate(Entity*, ScopeBase*, int64_t&) const': expression_evaluate.cc:67: error: call of overloaded 'pow(int64_t&, int64_t&)' is ambiguous /usr/include/math.h:257: note: candidates are: double pow(double, double) /usr/include/c++/4.2/cmath:373: note: long double std::pow(long double, int) /usr/include/c++/4.2/cmath:369: note: float std::pow(float, int) /usr/include/c++/4.2/cmath:365: note: double std::pow(double, int) /usr/include/c++/4.2/cmath:361: note: long double std::pow(long double, long double) /usr/include/c++/4.2/cmath:357: note: float std::pow(float, float)
20 lines
424 B
Makefile
20 lines
424 B
Makefile
# Created by: Ying-Chieh Liao <ijliao@FreeBSD.org>
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# $FreeBSD$
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PORTNAME= iverilog
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PORTVERSION= 11.0
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CATEGORIES= cad
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MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v11/
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DISTNAME= verilog-${PORTVERSION}
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MAINTAINER= zeising@FreeBSD.org
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COMMENT= Verilog simulation and synthesis tool
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LICENSE= GPLv2
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GNU_CONFIGURE= yes
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CONFIGURE_ARGS= --disable-suffix
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USES= bison compiler:c++11-lang gmake readline
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.include <bsd.port.mk>
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