forked from Lainports/opnsense-ports
29 lines
970 B
C++
29 lines
970 B
C++
--- IlmImf/ImfSystemSpecific.cpp.orig 2017-11-17 23:00:24 UTC
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+++ IlmImf/ImfSystemSpecific.cpp
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@@ -44,11 +44,23 @@ namespace {
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// Helper functions for gcc + SSE enabled
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void cpuid(int n, int &eax, int &ebx, int &ecx, int &edx)
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{
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+#if __i386__
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__asm__ __volatile__ (
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- "cpuid"
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- : /* Output */ "=a"(eax), "=b"(ebx), "=c"(ecx), "=d"(edx)
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- : /* Input */ "a"(n)
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+ "xchgl %%ebx,%k1\n"
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+ "cpuid\n"
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+ "xchgl %%ebx,%k1" \
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+ : /* Output */ "=a"(eax), "=&r"(ebx), "=c"(ecx), "=d"(edx)
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+ : /* Input */ "0"(n)
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: /* Clobber */);
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+#else
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+ __asm__ __volatile__ (
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+ "xchgq %%rbx,%q1\n"
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+ "cpuid\n"
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+ "xchgq %%rbx,%q1" \
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+ : /* Output */ "=a"(eax), "=&r"(ebx), "=c"(ecx), "=d"(edx)
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+ : /* Input */ "0"(n)
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+ : /* Clobber */);
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+#endif
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}
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#else // IMF_HAVE_SSE2 && __GNUC__
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