mykola2312
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ce12de6fc3
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implement VEX parser
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2024-08-13 18:10:37 +03:00 |
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mykola2312
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c6ee87c4c0
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add OOP boilerplate to ease VEX/EVEX parsing logic
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2024-08-13 16:01:05 +03:00 |
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mykola2312
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5e8df2bd51
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generate dump list of VEX and EVEX instructions
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2024-08-13 15:36:03 +03:00 |
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mykola2312
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5b739f6054
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add branching and instruction types for future VEX parser
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2024-08-01 04:38:09 +03:00 |
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mykola2312
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a681a53ff3
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now I can definitely tell if instruction has ModRM byte or no
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2024-08-01 02:37:08 +03:00 |
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mykola2312
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5998950f23
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begin implementing intel opcode syntax parser
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2024-08-01 02:24:43 +03:00 |
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mykola2312
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e8ae5937f8
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update on vex
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2024-07-31 23:29:08 +03:00 |
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mykola2312
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0f8e380dac
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skip even more 16 bit crap
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2024-07-29 00:46:58 +03:00 |
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mykola2312
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095d90776e
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add another 16 bit real mode filter
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2024-07-25 03:53:45 +03:00 |
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mykola2312
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467331c693
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strip rel16 since we're not going to encounter real mode in running processes on Linux or FreeBSD
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2024-07-25 03:40:06 +03:00 |
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mykola2312
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f81b7f524e
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fix regex
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2024-07-25 03:01:19 +03:00 |
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mykola2312
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8b9742ca42
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implement opcode parsing
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2024-07-25 01:29:02 +03:00 |
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mykola2312
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0310704f2b
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begin working on script to generate C files for my future disassembler
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2024-07-25 00:35:46 +03:00 |
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